The Hindu Business Line : Rapid strides by chip design houses

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Hyderabad Feb. 4 As new microprocessors with faster speeds and feature-rich electronic devices such as mobile phones capable of handling convergence make inroads, the Indian semiconductor industry is playing a key role in design innovation.

The contribution, especially from chip design houses, is in guiding the industry drift towards the 65- and 45-nanometre technologies.

Mr Rajeev Mahtani, Vice-President and Managing Director of NXP Semiconductors India, said that packing of higher density, leading to more functionality on a system on chip, coupled with low power consumption, are chief advantages of the 45-nano process.

Once high yields become a reality, this technology will also result in lower chip costs because of reduced material.

It is estimated that 45-nano chips can handle 125 million transactions against 70 million in 90-nano chips.

Industry players believe that the semiconductor industry is gradually drifting towards the 45-nano technology from the current 90- and 65-nano technologies and processes in the areas of chip design and embedded software and systems.

Significantly, there are different versions as to when this will go mainstream.

While some like Xilinx CEO Mr Willam P. Reolandts believe that the 45-nano would make inroads in many areas by 2008, others say that mainstream adoption would probably take place in 2009-10.

About 85 per cent of the design work is currently related to 90-nano tech, while 15 per cent of the designs have already moved in to 65- and 45-nano leagues, Mr Mahtani said.

The industry is adapting 45-nano technology in high-volume products as it makes a lot more economic sense for both design and fabrication.

Providing insight into the industry from design perspective, Mr Rajiv Maheswary, Senior Director of Marketing (Asia-Pacific) of Synopsis, an Electronic Design Automation (EDA) company, said that the costs of working on 45-nano tech is high and companies work on them in case of volume applications.

Since it is cost-driven, their applicability would initially be in volume business of electronics industries, including mobile devices. This is because it calls for a lot of design complexity.

Mr Maheswary said that some interesting patterns emerge in India where about 70 per cent of the work is on 90- and sub-90 nano technologies, and this is way ahead of the global trend, which averages about 28 per cent below 90-nano.

Mr Mohit Bhatnagar of Cadence Design Systems said that there continues to be considerable debate on the design format, but the focus continues to be on designing chips that have lower power consumption and higher processing capabilities.

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