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`Intel India played key role in fingernail teraflop chip'

Our Bureau


MS VASANTHA ERRAGUNTLA

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Bharat Matrimony

Bangalore Feb 22 An engineering team of the Intel India Development Centre (IDC) had contributed 50 per cent of the work in the development of the teraflops research chip in terms of the logic, circuit and physical device, which is as small as a fingernail.

The world's first programmable processor that delivers supercomputer-like performance from a single, 80-core chip uses less electricity than most of today's home appliances.

The IDC research team was led by Ms Vasantha Erraguntla, Engineering Manager.

The IDC is part of the Intel Corporate Technology Group's Circuit Research Labs established in June 2004. It is one of the two such locations worldwide (the other being in Oregon, US).

"The focus team here has demonstrated immense talent and potential. With this advancement into the `era of tera,' we have established without a doubt the power of global collaboration and the capabilities of Indian engineering talent," said Ms Erraguntla.

Tera-scale performance, and the ability to move terabytes of data, will play a pivotal role in future computers with ubiquitous access to the Internet by powering new applications for education and collaboration, as well as enabling the rise of high-definition entertainment on PCs, servers and handheld devices.

Intel has no plans to bring this exact chip designed with floating point cores to market.

However, the company's tera-scale research is instrumental in investigating new innovations in individual or specialised processor or core functions, the types of chip-to-chip and chip-to-computer interconnects required to best move data and, most importantly, how software will need to be designed to best leverage multiple processor cores.

The teraflops research chip offers specific insights in new silicon design methodologies, high-bandwidth interconnects and energy management approaches.

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