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Altera unveils ‘zero power’ programmable chip for portables

Combines FPGAs ease with Application-Specific Integrated Circuit economies

Anand Parthasarathy

As small as IT gets!: Asia Pacific Product Marketing Manager, Mr Razak Mohammadali, with Altera’s tiny Complex Programmable Logic Device MAX IIZ, which will simplify portable product design. —

Anand Parthasarathy

Bangalore, Dec. 18 A perennial dilemma facing digital device designers is: should we put together the design using the cheaper development route of Field Programmable Gate Arrays (FPGAs) or should we aim for a lower unit cost of the end product by creating our own Application-Specific Integrated Circuit (ASIC)? It is not an easy decision: The difference could mean a few million additional dollars of R&D expenses upfront.

Twenty five years ago, the US-based Altera Corporation pioneered a via media option: the Complex Programmable Logic Device or CPLD: which offered the design efficiencies of the FPGA route – even as it allowed product companies the option of ‘burning’ their software into device-ready chips.

And on Tuesday it unveiled a new CPLD, cannily aimed at the booming portable product market – from mobile phones to pocket PCs to hand held point-of-sale terminals and medical diagnostic devices.

The MAX IIZ CPLD series is touted as a ‘zero power’ chip: In the chip industry, any device that consumes less than 100 micro amps qualifies for the zero power rating, and by consuming static power of around 29 microamps, this is ‘powerless’ in much the same sense as a so-called ‘zero volt’ bulb.

With 240 to 570 programmable logic elements on board and between 50 and 150 user input-output ports (depending on the model), the Max IIZ has been optimised for today’s most popular portable devices, said Mr Razak Mohammadali, Altera’s Product Marketing Manager for Asia Pacific, during a special briefing for Business Line. The CPLDs which would be available in the first quarter of 2008, were aggressively priced at around $1.25 a piece, he added. Altera’s Indian R&D partner had helped test the chip in a number of reference designs and potential customers can access programming code for typical applications at this web page:

http://www.altera.com/support/examples/max/exm-max.html

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