The 28th International Conference on VLSI Design inaugurated in Bengaluru on Monday highlighted the role India could play in building a smart connected world with sensor technology and the Internet of Things (IoT). However, industry honchos who participated in the conference said the country is facing a shortage in employable VLSI design engineers.

VLSI or Very Large Scale Integration, is the process of creating an integrated circuit (IC) by combining thousands of transistors into a single chip. “It is not a problem of quantity that we are facing as we have more engineers graduating every year across the country than industry can employ. It is a problem of quality – the quality of VLSI education and quality of students getting through engineering institutions is poor.

“The real solution to solving this employability issue is for engineering institutions to offer good quality VLSI education with live hands-on projects as a part of B.Tech and M.Tech programmes” Jaswinder S. Ahuja, President, VLSI Society of India and Corporate VP & MD of Cadence Design Systems told BusinessLine .

Fresh VLSI engineers earn anywhere upwards of ₹5–7 lakh per annum with multinationals like Broadcom Semiconductor India offering ₹10 lakh for freshers.

Courses on offer Venkatesh Prasad, CEO of RV-VLSI Design Centre, a finishing school that has trained over 1,800 students and corporate professionals in VLSI and placed 900 of them, pointed out that the demand from the 150 companies that it works with amounts to 3,000 VLSI skilled engineers per annum.

“We are able to cater to just 50 per cent of that demand. And the demand is all set to increase to 30,000 skilled VLSI engineers per annum after 12 months” he said. RV-VLSI has partnered with IEEE last year to offer the latter’s blended learning programme which combines online learning of VLSI fundamentals with 70 per cent of time spent on hands-on projects.

“We launched two courses last year – an introductory course in Logic Design and an advanced course in RTL Verification. And will be launching two more courses in Static Timing Analysis and RTL Design using Verilog HDL, shortly. Customised courses for corporates cost $200 per day, per employee and ₹5,000 for students for a 3-day programme” said Karen L Hawkins, Senior Director, Product Design, IEEE.

One of the biggest challenges faced by industry today is that entry level VLSI engineers are not readily employable and require to be trained for 6-12 months before becoming billable, observed Ashok Chandak, Chairman, IESA.

Poaching threat “While bigger companies can afford to train freshers small and medium enterprises cannot afford it. Another issue is that mid-level VLSI talent with 3-7 years of experience get poached.

“To address these issues, IESA’s Talent CIG (Core Interest Group) has rolled out programmes where engineering colleges are assisted in structuring course content, advised on labs and tools that they should be using and in designing 4-6 month hands-on projects to build competence” said Chandak.

Errata

An earlier version of this story incorrectly said Ashok Chandak is President of IESA. He is Chairman, IESA. The error is regretted.

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